In-Circuit Design: Beyond Design - DC vs. AC Power Integrity
By Barry Onley - iCD
There is much confusion over the role of Power Integrity (PI) analysis in maintaining high-speed PCBs' performance and reliability. This technical brief gives you a breakdown of the application of each type of PI. There are two types of Power Integrity:
DC Power Integrity
capability found in EDA tools such as Altium Designer is a static power integrity function that analyzes voltage power supply and current for each driver (I/O device). To get the correct DC voltage drop across the power plane, you need to consider the DC-DC voltage supply capabilities, the total current consumption of the high-speed driver (I/O device) connected to a particular power plane, and the plane continuity.
Basically, this is an exercise in ensuring that there's enough copper on the planes to get the necessary current to each device on the board so that the current density does not exceed the safe limits for temperature rise in a particular region.
Regardless of whether the board is analyzed or not, typical solutions to DC PI issues include increasing the thickness of copper on the planes and decreasing the size of the antipads under fine pitch BGAs.
For more information about antipads, please refer to iCD's article: http://www.icd.com.au/articles/Design_Rules_&_DfM_PCB-Jun2012.pdf
These recommendations prevent voltage drop due to excess current and are simple, cost-effective solutions that can be done routinely to avoid the DC PI analysis software cost.
AC Power Integrity
analysis is far more important, and optimization cannot be achieved without analysis. Also, this analysis requires a 3D field solving capable tool such as the iCD PDN planner.
AC power integrity deals with how the supply decoupling is designed and return paths for high-speed signals. Optimizing the PDN impedance - in the frequency domain - is the key objective to minimize the voltage power supply noise and radiated emissions of a high-speed PCB. The iCD PDN Planner allows you to analyze multiple power supplies to maintain low impedance over the entire frequency range, dramatically improving PCB performance.
As the frequency approaches half wavelength, the planes (power and ground) act as an unterminated transmission line and start to resonate. This resonance is not a problem unless it falls on the fundamental frequency or one of the odd harmonics in which the board will radiate. The optimization of the PDN is a trial and error process that needs to be done in conjunction with the stackup materials to fully exploit all avenues to suppress the plane resonance peaks fully. It is, therefore, a requirement for high-speed design.
The iCD Stackup Planner's seamless integration into all major EDA tool suites such as Mentor, Cadence, Zuken, and Altium provides you with total confidence in impedance control and product reliability. The iCD Stackup and PDN Planners are also tightly integrated to allow on-the-fly analysis of substrate materials and properties to achieve a perfect characteristic and differential impedance of transmission lines and low AC impedance across the entire frequency range up to 100GHz.